1. Field of the Invention
The present invention relates to a transmission-reception system, and more particularly relates to a transmission-reception system which transmits and receives data via a signal transmission line.
2. Description of the Background Art
FIGS. 24A and 24B are circuit block diagrams illustrating a conventional transmission-reception system.
In the conventional transmission-reception system shown in FIGS. 24A and 24B, a transmitter 311 in a semiconductor device 301 and a receiver 313 in a semiconductor device 303 are connected by a signal transmission line 302. Signal transmission line 302 has a parasitic capacitance equal to the total capacitance of a plurality of capacitors 312.
Referring to FIG. 25, transmitter 311 and receiver 313 are each constituted by a CMOS inverter. More specifically, transmitter 311 includes a P channel MOS transistor 321 and an N channel MOS transistor 322 connected in series between a line receiving supply potential Vcc and a line receiving ground potential GND. The gates of MOS transistors 321 and 322 receive a signal .phi.1 generated in an internal circuit of semiconductor device 301, and the drains of MOS transistors 321 and 322 are connected to one end of signal transmission line 302. Signal .phi.1 attains to "L" level and "H" level respectively according to data, for example, "1" and "0".
Receiver 313 includes a P channel MOS transistor 323 and an N channel MOS transistor 324 connected in series between a line receiving supply potential Vcc and a line receiving ground potential GND. The gates of MOS transistors 323 and 324 are connected to the other end of signal transmission line 302, and a signal .phi.3 is output from the drains of MOS transistors 323 and 324 to an internal circuit of semiconductor device 303.
An operation of the transmission-reception system is next described. When signal .phi.1 is L level, P channel MOS transistor 321 and N channel MOS transistor 322 in transmitter 311 are respectively turned on and turned off to allow signal transmission line 302 to be charged to H level. Accordingly, in receiver 313, P channel MOS transistor 323 is turned off and N channel MOS transistor 324 is turned on, so that signal .phi.3 attains to L level.
When signal .phi.1 is H level, P channel MOS transistor 321 and N channel MOS transistor 322 in transmitter 311 are respectively turned off and turned on, so that signal transmission line 302 is discharged to L level. Accordingly, in receptor 313, P channel MOS transistor 323 and N channel MOS transistor 324 are respectively turned on and turned off, so that signal .phi.3 attains to H level. The internal circuit of semiconductor device 303 reproduces data based on signal .phi.3.
FIG. 26 is a circuit block diagram illustrating another conventional transmission-reception system provided for comparison with FIG. 25.
With reference to FIG. 26, an inverter including a resistor 341 and an N channel MOS transistor 342 constitutes a transmitter 331 in the transmission-reception system. Resistance element 341 is connected between a line receiving reference potential Vrefll and one end of a signal transmission line 332. N channel MOS transistor 342 is connected between one end of signal transmission line 332 and a line receiving ground potential GND. The gate of N channel MOS transistor 342 receives signal .phi.1 generated in an internal circuit of a semiconductor device of transmission side. Reference potential Vrefll has a value between those of supply potential Vcc and ground potential GND.
A receiver 333 is constituted by a differential amplifier including P channel MOS transistors 343 and 344 and N channel MOS transistors 345-347. MOS transistors 343 and 345 and MOS transistors 344 and 346 are respectively connected in series between a line receiving supply potential Vcc and a node N347, and MOS transistor 347 is connected between node N347 and a line receiving ground potential GND. The gates of P channel MOS transistors 343 and 344 are both connected to the drain of P channel MOS transistor 343, and thus P channel MOS transistors 343 and 344 constitute a current mirror circuit.
The gate of N channel MOS transistor 345 is connected to the other end of signal transmission line 332, and the gate of N channel MOS transistor 346 receives reference potential Vref12. Reference potential Vref12 has a value between those of reference potential Vref11 and ground potential GND. Signal .phi.3 is output from the drain of N channel MOS transistor 346, i.e. node N346, to an internal circuit of a semiconductor device of the reception side. The gate of N channel MOS transistor 347 receives supply potential Vcc, and N channel MOS transistor 347 supplies a constant current.
When signal .phi.1 is L level, N channel MOS transistor 342 is turned off and signal transmission line 332 is charged to H level. Accordingly, the current flowing through MOS transistors 343-345 becomes larger than the current flowing through MOS transistor 346, so that node N346 is charged to H level and signal .phi.3 attains to H level.
When signal .phi.1 is H level, N channel MOS transistor 342 is turned on and signal transmission line 332 is discharged to L level. Accordingly, the current flowing through MOS transistors 343-345 becomes lower than the current flowing through MOS transistor 346, so that node N346 is discharged to L level and signal .phi.3 attains to L level. The semiconductor device of the reception side reproduces data based on signal .phi.3.
According to the transmission-reception system shown in FIGS. 24 and 25, the potential on signal transmission line 302 should be fully swung between ground potential GND and supply potential Vcc. As a result, a large amount of consumption current I is necessary for charging and discharging of signal transmission line 302, as expressed by the equation I=C.multidot.Vcc.multidot.f (C is parasitic capacitance of signal transmission line 302, and f is transmission frequency).
According to the transmission-reception system shown in FIG. 26, it is enough to swing the potential on signal transmission line 332 near reference potential Vref12. As a result, consumption current I necessary for charging and discharging of signal transmission line 332 can be expressed by the equation I=C.multidot.Vdata.multidot.f (Vdata is voltage amplitude of signal transmission line 332). Accordingly, consumption current I can be reduced by decreasing the voltage amplitude Vdata.
In the transmission-reception system, the current continuously flows through N channel MOS transistor 342 in transmitter 331 during a period in which signal .phi.1 is H level. During a period in which the potential on signal transmission line 332 is higher than reference potential Vref12, the current is continuously passing through from the line receiving supply potential Vcc to the line receiving ground potential GND via receiver 333. Therefore, the current consumed by the entire system I is still large even in the transmission-reception system shown in FIG. 26.